FlowPlace: Flow Matching for Chip Placement
Title: FlowPlace: Leveraging Flow Matching for Chip Placement
Abstract: Physical design relies heavily on chip placement. Although generative approaches, such as diffusion models, present promising learning-based alternatives, existing methods suffer from specific drawbacks: they rely on random synthetic data for pre-training, demand extensive sampling durations, and frequently produce overlapping layouts because they depend on gradient-based solvers during sampling. To address these challenges, we introduce FlowPlace, a novel approach that incorporates mask-guided synthetic data generation, efficient training via flow-based methods with adaptable prior injection, and hard constraint sampling to ensure overlap-free designs. Evaluations on the ICCAD 2015 and OpenROAD benchmarks demonstrate that FlowPlace delivers superior PPA metrics, reduces sampling time by 10 to 50 times, and completely eliminates overlaps.
Source: arXiv Generated at: 2026-06-02 00:00:00 UTC





