arXiv

Uncertainty-Aware End-to-End Co-Design of Neural Network Processors: From Training and Mapping to Fabrication

Title: Uncertainty-Aware End-to-End Co-Design of Neural Network Processors: From Training and Mapping to Fabrication

Abstract:

The development of neural network processors constitutes a comprehensive end-to-end co-design challenge. In this context, the inference workload is dictated by the network architecture and training budget; chip area, latency, and energy consumption are determined by hardware mapping choices; and these technical attributes ultimately influence fabrication yield and manufacturing expenses. Currently, these decisions are typically isolated into distinct phases, and prevailing co-design methods are often rigidly tied to particular algorithms. This rigidity hinders the ability to enhance individual components without necessitating a complete overhaul of the entire pipeline.

To address these limitations, this study introduces a unified framework rooted in monotone co-design theory. This framework integrates four interoperable design blocks that cover network training, chip mapping, wafer-level fabrication, and compute resource allocation. By exposing only a functionality-resource interface to the broader system, each block can be optimized independently without requiring structural modifications to other components. A primary innovation of this approach is its handling of uncertainty. Instead of reducing stochastic outcomes to simple point estimates, the framework treats "Confidence"—defined as the inverse of success probability—as an explicit, optimizable resource comparable to cost, time, and power.

The efficacy of this methodology is demonstrated through three case studies. The first validates the framework’s ability to identify Pareto-optimal implementations across diverse application scenarios. The second confirms that Confidence serves as a continuously adjustable design parameter rather than merely a retrospective diagnostic tool. Finally, the third case illustrates that enhancing the implementation set of any single block automatically improves the global Pareto front, achieving this result without altering the underlying co-design architecture.


Source: arXiv Generated at: 2026-06-04 00:00:00 UTC

Related Articles

China’s Robotaxi Dilemma Shows AI Policy Tension Between Growth and Jobs
Bloomberg

China’s Robotaxi Dilemma Shows AI Policy Tension Between Growth and Jobs

China’s robotaxi expansion highlights the policy tension between driving economic growth through AI and protecting emplo...

Exams watchdog warns of rise in high-tech cheating
BBC News

Exams watchdog warns of rise in high-tech cheating

Ofqual warns of rising high-tech cheating, with smart devices involved in 44% of misconduct cases. Invigilators are trai...

Thailand’s Richest Man Plans $4.3 Billion Expansion Amid AI Boom
Bloomberg

Thailand’s Richest Man Plans $4.3 Billion Expansion Amid AI Boom

Thailand’s wealthiest individual is investing $4.3 billion in expansion, capitalizing on the booming artificial intellig...

Reuters

Amazon unveils new AI warehouse robot in $12 billion Europe push

Amazon unveiled a new AI warehouse robot, marking a key step in its $12 billion European expansion strategy to enhance l...

US Tech Sector Announces Most Job Cuts in Nearly Two Years
Bloomberg

US Tech Sector Announces Most Job Cuts in Nearly Two Years

The US tech sector recorded its highest wave of layoffs in nearly two years, signaling a significant downturn for the in...

Iran Says No Progress in US Talks | The Opening Trade 6/4/2026
Bloomberg

Iran Says No Progress in US Talks | The Opening Trade 6/4/2026

Iran reports no progress in US talks on June 4, 2026. The Opening Trade highlights the ongoing diplomatic impasse betwee...